Logical Address, Physical Address and MMU

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Introduction

When a program accesses memory, it usually does not use the direct physical address of RAM. It works with a logical or virtual address that belongs to its own private memory view.

The operating system and hardware translate that address into a physical address. This separation helps provide process isolation, memory protection, and flexible memory management.

Logical Address and Physical Address

A logical address, also called a virtual address, is the address generated by the CPU for a running program. It belongs to the process address space and does not directly identify a raw RAM location.

A physical address is the actual address in physical memory after translation. It tells where the corresponding data is located in RAM when the memory is present there.

For example, if a program uses logical address 2500, that does not mean the data is at physical RAM address 2500. The logical address must first be translated.

Logical Address and Physical Address

Logical Address and Physical Address

Logical vs Physical Address

Point

Logical / Virtual Address

Physical Address

Generated by

CPU while running a program

MMU after translation

Belongs to

Process memory view

Actual physical memory

Seen by program

Yes

Usually no

Purpose

Gives each process a private address view

Identifies real RAM location

Protection role

Checked before access

Used only after valid translation

This distinction is important because two processes may use the same logical address value, but those addresses can translate to different physical locations.

Role of MMU

The Memory Management Unit, or MMU, is hardware that translates logical or virtual addresses into physical addresses. It also helps enforce memory protection.

The MMU works during memory access, so it must be fast. Each time the CPU accesses memory, the MMU checks whether the access is valid and then translates the address if allowed.

If the access is invalid, the MMU does not allow the memory access to continue. Instead, it raises a trap or fault so the operating system can handle the problem.

Base and Limit Registers

A simple way to understand address translation is the base-limit model. This model assumes a process or segment is placed in one contiguous block of physical memory.

The base register stores the starting physical address. The limit register stores the maximum valid logical address range.

For example, if Base = 100 and Limit = 200, then valid logical addresses are from 0 to 199. Logical address 0 maps to physical address 100, and logical address 199 maps to physical address 299.

Base-Limit Translation

Base-limit translation has two steps: first check protection, then translate the address.

The rule is:

  • Valid address: If logical_address < limit, calculate physical_address = base + logical_address.

  • Invalid address: If logical_address >= limit, reject the access as an invalid memory access.

The limit check must happen before adding the base. If the logical address is equal to or greater than the limit, the access is invalid.

This gives both translation and protection. The process can use only the logical address range assigned to it.

Base, Limit Registers and Translation

Base, Limit Registers and Translation

Worked Example

Suppose, Base = 14000, Limit = 4000 and logical address is 2500.

First check the limit: 2500 < 4000, so the address is valid. Then calculate the physical address: Physical Address = 14000 + 2500 = 16500.

Now take logical address 4200.

The limit check fails because 4200 < 4000 is false. So the access is invalid, and the base should not be added.

OS and Hardware Responsibilities

Address translation uses both operating system support and hardware support. Their jobs are related, but not the same.

The MMU handles fast runtime work:

  • Validity check: It checks whether the address is allowed.

  • Translation: It converts logical or virtual address into physical address.

  • Fault trigger: It raises a trap if the access is invalid.

The operating system prepares and manages the setup:

  • Memory setup: It decides the memory layout for processes.

  • Register or table setup: It prepares base-limit values or translation structures.

  • Corrective action: It may load missing memory, deny access, or terminate the process.

The hardware performs the fast check and translation. The OS defines the rules and handles exceptions.

OS and Hardware Responsibilities

OS and Hardware Responsibilities

Why Address Translation Matters

Address translation allows each process to believe it has its own memory view. The process does not need to know where its memory is physically placed in RAM.

This gives several benefits:

  • Isolation: One process cannot freely access another process's memory.

  • Protection: Invalid or forbidden memory access can be blocked.

  • Relocation: A program can run even if placed at different physical memory locations.

  • Virtual memory support: Logical addresses can map to RAM, files, or storage-backed regions through more advanced mechanisms.

The base-limit model is a simple starting point. Modern systems often use paging and page tables, but the core idea remains: the program uses virtual addresses, and hardware plus OS support translate them safely.

Summary

A logical or virtual address is the address used by a running program inside its private memory view. A physical address is the actual RAM address reached after translation.

The MMU translates logical addresses into physical addresses and checks whether access is valid. In the base-limit model, the address is valid only if logical_address < limit; then the physical address is calculated as base + logical_address.

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